Publication detail

Design and Optimization of PMaSynRM with Short-circuit Fault Tolerance.

SIZONENKO, V. VÍTEK, O. KLÍMA, P. BIANCHI, N.

Original Title

Design and Optimization of PMaSynRM with Short-circuit Fault Tolerance.

Type

conference paper

Language

English

Original Abstract

This paper presents electromagnetic design and optimization of a fault-tolerant permanent magnet assisted synchronous reluctance machine. The fault tolerance against three-phase short-circuit in the stator winding is ensured by utilizing a double three-phase system and by using optimized rotor geometry. The chosen optimization method is the non-dominated sorting genetic algorithm II; its particular settings for the given problem are suggested and described in detail. As a result, machines with steady-state three-phase short-circuit ratio equal to 1 and lower have been managed to achieve within ten generations. However, the cost of such an improvement is the reduction in the average torque of a machine, although without a drop in its rotor torque density, compared to the initial design.

Keywords

Permanent magnet assisted synchronous reluctance machine (PMaSynRM), finite element analysis (FEA), non-dominated sorting genetic algorithm II (NSGA-II), fault-tolerant electrical machine, short-circuit, double three-phase system.

Authors

SIZONENKO, V.; VÍTEK, O.; KLÍMA, P.; BIANCHI, N.

Released

9. 10. 2024

Publisher

IEEE

Location

Turin, Italy

ISBN

979-8-3503-7060-7

Book

2024 IEEE International Conference on Electrical Machines (ICEM)

Pages count

7

URL

BibTex

@inproceedings{BUT191231,
  author="Vitaliy {Sizonenko} and Ondřej {Vítek} and Petr {Klíma} and Nicola {Bianchi}",
  title="Design and Optimization of PMaSynRM with Short-circuit Fault Tolerance.",
  booktitle="2024 IEEE International Conference on Electrical Machines (ICEM)",
  year="2024",
  pages="7",
  publisher="IEEE",
  address="Turin, Italy",
  doi="10.1109/ICEM60801.2024.10700561",
  isbn="979-8-3503-7060-7",
  url="https://ieeexplore.ieee.org/document/10700561"
}

Responsibility: Ing. Marek Strakoš